1. Technical Field
The invention relates to data communication and more particularly to a system and method for the robust detection/demodulation of a frequency shift keyed signal. Still more particularly, the invention relates to a system and method for the efficient utilization of a digital signal processor for the demodulation of a plurality of frequency shift keyed signals.
2. Description of the Related Art
Frequency shift keying ("FSK") is a common digital modulation technique used for data transmission. Various signal frequencies are selected to represent predetermined values. In frequency shift keying for binary data transmission (i.e. the transmission of 1's and 0's), the instantaneous frequency of an output signal is shifted back and forth between two discrete values, sometimes called the mark and the space frequencies. Each frequency value corresponds to one of the two binary values: typically the mark frequency value corresponds to 1 and the space frequency corresponds to zero.
Frequency shift keying is often selected for data transmission through mediums where the signal strength is subject to unpredictable variation, such as occurs in radio transmission or telephone transmission over analog (e.g. two-wire pair) transmission lines. Frequency shift keying is favored for low to medium rate data transmission in extremely low cost MOdulator/DEModulators ("Modems"). The advantages of frequency shift keying are seen in radio and two wire pair transmission. Because information is transmitted in frequency changes, there is increased immunity to amplitude nonlinearities. Also, with frequency shift keying there is no need for carrier phase recovery thus simplifying recovery of the modulating signal.
Frequency shift keying belongs to a class of signals subject to noncoherent demodulation or detection. Noncoherent detection has generally meant envelope detection of a signal. At first examination, it may seem surprising that frequency shift keying can be subjected to envelope detection. Frequency shift keying is generally viewed as a digital form of frequency modulation. Classical analog detection has accordingly involved applying the received signal to parallel band pass filters tuned to the mark and the space frequency, respectively. The output of each band pass filter is applied to an envelope detector, and the respective output signals of the envelope detectors are subjected to subtraction of one of the envelope detector output signals from the other by use of a summer. Analog to digital conversion of the output of the summer recovers the binary information.
Digital signal processors ("DSP") are a type of dedicated microprocessor which provide real time processing of one or more digital signals taken from one or more logical or physical channels. A digital signal processor may be programmed to operate as a circuit metaphor for an analog device. (Depending upon device capacity, each signal may be applied to a different analog device metaphor.) It can readily be seen that digital signal processors are extremely flexible tools for signal processing. However, direct application of a metaphor for the classical frequency shift keying detection circuit, while possible, imposes substantial computational loading of the digital signal processor.
An example of a prior art frequency shift keying demodulator as realized on a digital signal processor is illustrated in an article entitled, Implementation of an FSK Modem Using the TMS320C17, by Evans et al., at page 356 of Digital Signal Processing Applications with the TMS 320 family (Vol. 2) (Copyright 1990 Texas Instruments). In essence, a received signal R(t) is multiplied with a delayed version of itself. The resultant signal is subjected to filtering to remove a double frequency component. The sign of the output of the lowpass filter indicates the current value of the received data.
The high computational loads seen in prior noncoherent frequency shift keyed detectors realized on digital signal processors can be explained by reference to sampling theory. Digital signal processors, being digital computers, operate on discrete representations of value. Analog signals are continuous. Discrete representations of an analog signal are provided the digital signal processor periodically sampling the continuous process to provide a set of numbers which equal instantaneous values assumed by the process. Critical to the sampling process is determination of the type of sampling to be done and the sampling period T required to supply sufficient information to the computer to accurately and reliably reflect the true nature of the continuous process. In other words, sufficient data must be collected from the continuous process to allow someone looking at the collected data to reproduce the original waveform. Sampling theory allows determination of the minimum number of such sampling points. This in turn determines the minimum computational load, as relates to one channel, for the digital signal processor. Determination of the appropriate sampling rate is complicated in application to detection and demodulation of frequency shift keying because of the generation of spurious harmonic signals.
Noncoherent demodulation of frequency shift keyed signals typically requires computation of the receiving digital signal processor demodulating process at a sample rate 8 times or greater than the baud (bits per second) rate. The high sampling rate is required to allow post detection filtering of harmonic frequency components generated by filtering dictated by the classical process as taught by Evans et al. above. While the technique works well, post detection filtering complicates the process, which still requires sample rate processing at a high sample rate.